# Problem Set 10
Source: [Problem_Set_10_Digital_Logic](https://www.realdigital.org/downloads/daf60d20cc9d75a7ce495bc58dcf2f85.pdf) Revision: n/a
## 1
## 1.1
Sketch a block diagram for a 4-bit ALU built from bit-slice ALU circuits that can implement the functions shown in the table. (Note: I’m not looking for the circuits inside the bit-slice module, but rather a circuit that uses the bit-slices as blocks). Label all signals. Recall that inputs to the bit slices must come from the A and B input busses as well as from neighboring bit slices, and outputs from the slices must drive the F output bus as well as neighboring bit slices. To design the signals that communicate information between slices, you must understand the ALU operations and the implications for information transfer (e.g., does the operation A PLUS B require that information be transferred between slices? If so, what? Does the operation A OR B require that information be transferred?).
| Opcode | Operation |
| ------ | --------- |
| 0 | a + b |
| 1 | a + 1 |
| 2 | a - b |
| 3 | a - 1 |
| 4 | a ^ b |
| 5 | ~a |
| 6 | a | b |
| 7 | a & b |
---
We have already designed bit slices for addition and subtraction. Other operations do not need any information exchange between bit slices. In other words, no carry is required in operations other than addition and subtraction. The problem does not ask for the logic inside the blocks, but for completeness they are in the following table:
If our design goal is less area as possible, then we can implement the in- and decrement operations using addition and subtraction. For example if `opcode == 3` then the opcode multiplexer could select the subtraction operation and set `b = 1`.
The problem wants the bit slices as single blocks. We have 8 bit slice blocks which can be selected using a multiplexer and connected to the output via a demultiplexer. The de/multiplexer are controlled by the opcode. All these components make up a single bit block. Four bit blocks are cascaded to implement the four bit ALU.
## 1.2
The ALU operation table from the module has been reproduced below. Complete the `r` and `co` table entries.
| Opcode | Operation | Bitslice, `f(a, b, ci) = r, co` |
| ------ | --------- |-------------------------------- |
| 0 | a + b | `r = a^b^ci, co = (a&b)\|(ci& (a^b) )` |
| 1 | a + 1 ||
| 2 | a - b ||
| 3 | a - 1 ||
| 4 | a ^ b ||
| 5 | ~a ||
| 6 | a | b ||
| 7 | a & b ||
---
| Opcode | Operation | Bitslice, `f(a, b, ci) = r, co` |
| ------ | --------- |-------------------------------- |
| 0 | a + b | `r = a^b^ci, co = (a&b)\|(ci& (a^b) )` |
| 1 | a + 1 | `r = a~^ci, co = a\|(a&ci)\|ci` |
| 2 | a - b | `r = a^b^ci, co = (~a^b)\|(ci & (~a^b) )` |
| 3 | a - 1 | `r = a~^ci, co = a\|(~a&ci)\|ci` |
| 4 | a ^ b | `r = a^b, co = 0` |
| 5 | ~a | `r = ~a, co = 0` |
| 6 | a | b | `r = a\|b, co = 0` |
| 7 | a & b | `r = a&b, co = 0` |
````{note}
:class: margin
Remember that `co` in the adder can also be written as `co = (a&b)\|(a&ci)\|(b&ci)`, but as `r` already contains `a^b`, we can reuse it and implement `co` as `co = (a&b)\|(ci& (a^b) )`
The same applies to subtraction: `co = (~a^b)\|(~a&ci)\|(b&ci)` is better written as `co = (~a^b)\|(ci & (~a^b) )`